Sr. Principal SW Engineer, 3DIC P&R & AI-driven EDA Automation

• BS degree with 10+ years or MS degree and 5+ years of engineering work experience in the semiconductor industry.
• Experience in physical implementation, place-and-route, and signoff tools. Familiar with Cadence digital flows and advanced packaging design with Allegro Package Designer.
• Knowledge and experience in 3D-IC system planning, implementation, analysis, and signoff flows is a plus
• Hands-on experience in scripting languages, such as TCL, Perl, YAML, and Python.
• Good trouble-shooting and technical documentation skills.
• A self-motivated, proactive leaner and team player, with excellent communication skills and a customer-oriented attitude.

The annual salary range for California is $154,000 to $286,000. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

• Product Engineer for Integrity 3D-IC.
• Developing interfaces and integrating various Cadence tools and engines into the Integrity 3D-IC platform.
• Working closely with R&D group to develop, integrate and enhance 3D-IC solutions, including 3D-IC system planning, implementation, and analysis/verification, and Agentic AI applications.
• Collaborating with the field teams in customer engagement and providing technical support and guidance.
• Communicating and coordinating with multiple R&D groups and field teams to enable 3D-IC solutions to customers.