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Applications Engineering

Overview
Synopsyssynopsys.comPosted 7 weeks ago
Sunnyvale, CA, USOn-site
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Seniority level
Senior
Employment type
Full time
Work experience
10+ years
Specialization
Design & creative

About the role

Position Summary The Principal Applications Engineer for Prime Power RTL 2.0 is a recognized technical authority on RTL-stage power analysis within Synopsys' low-power design portfolio. This role provides strategic customer engagement, advanced methodology development, and cross-functional leadership to drive PPRTL adoption across complex SoC, AI accelerator, and mobile processor designs. Operating with minimal oversight, the Principal AE exercises wide latitude on critical engagements—leading multi-tool deployments spanning PPRTL, VCS, Verdi, PrimeTime, RTL Architect, Fusion Compiler, and UPF/low-power verification flows. Level Profile

  • Supervision & Scope: Minimal oversight; leads complex multi-product projects beyond PPRTL.
  • Impact: Measurable department impact; coaches and approves work of Staff+ AEs.
  • Experience: BS + 10 years related experience, or MS + 8 years. Key Responsibilities
  • Serve as primary technical advisor for Tier-1 and strategic accounts on RTL power budgeting, architecture exploration, and pre-implementation signoff; engage customer executive leadership.
  • Architect end-to-end methodologies: logical CGE/lint/ODC, physical glitch/RTLA, hybrid NDM import, WCDF calibration, FSDB stimulus quality, and multi-rail UPF analysis.
  • Lead complex evaluations demonstrating PPRTL correlation with PrimeTime PX and ZeBu Empower metrics; influence flow and calibration strategy in ambiguous customer situations.
  • Resolve cross-tool escalations; coach Staff+ AEs, deliver advanced training, and provide structured R&D and competitive feedback.
  • Partner with Sales on strategic opportunities; drive benchmark wins, license expansion, and cross-functional Apps/R&D/Marketing initiatives. Required Qualifications
  • Bachelor's degree in EE, CE, or related field (MS/PhD preferred); 10+ years in EDA applications, design consulting, or IC design (or MS + 8 years).
  • Expert RTL power knowledge: CGE/CGR/DACGE, glitch, memory, and multi-rail UPF domains.
  • Expert Prime Power RTL hands-on experience; advanced VCS/Verdi/SDF/UPF; strong Tcl flow development.
  • Proven leadership of complex customer engagements with measurable business impact. Preferred Qualifications
  • PrimeTime PX signoff correlation; RTL Architect/FC/NDM flows; ZeBu emulation-based power analysis.
  • VC SpyGlass/VC LP low-power verification; IEEE 1801 UPF expertise.
  • Publications or presentations (DAC/SNUG); AI, mobile, or datacenter SoC RTL power experience

Key skills

  • Budgeting