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Design Verification Architect / Director

Overview
Cadencecadence.comPosted 6 weeks ago
San Jose, CA, US$186k to $345k per yearकार्यालयातून
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वरिष्ठतेची पातळी
Executive
नोकरीचा प्रकार
पूर्णवेळ
कामाचा अनुभव
17+ years
विशेषीकरण
Embedded & firmware

Requirements

  • 17+ years of design verification experience
  • BS (or higher) in EE/Computer Engineering
  • Proven experience at leading/managing team.
  • Strong managerial, leadership and interpersonal skills
  • Excellent knowledge of computer architecture and design verification fundamentals
  • Thorough understanding of System Verilog, UVM, and other programming languages to build flexible and reusable complex testbenches
  • Exposure to scripting languages like Perl, Unix shell or similar languages
  • Experience with assembly language programming required
  • Experience with Formal Verification will be a plus
  • Experience with the development of fully automated flows
  • Experience with Gate Level Simulations
  • Excellent written and oral communication skills necessary
  • Knowledge of processor verification required

The annual salary range for California is $185,500 to $344,500. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

Key skills

  • Perl
  • Unix

Benefits & perks

  • Equity
  • Generous vacation
  • Healthcare
  • Retirement

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.Location

San Jose, CA and Austin, TX

Job DescriptionResponsibilities

As a Design Verification Team Director, lead and run the Processor Verification team, you will be responsible for the verification of microprocessor cores and their peripherals

Relevant experience in-order/out-of-order CPU cores and memory subsystem strongly preferred

Crafting verification plans and executing them to verify highly complex CPU designs.

You will implement simulation or emulation testbenches, assembly/C language diagnostics, assertion checkers or coverage monitors to meet target verification goals.

You will be responsible for coverage collection and closure

You will work closely with cross-functional teams (DV/Arch/Design/FW) to identify coverage scope

Tracking and reporting the work of 7-10 engineers